1. Field of the Invention
This invention relates to a D.C. stable semiconductor memory array and more particularly to such an array in which each memory cell comprises four field effect transistors.
2. Description of the Prior Art
The above-mentioned Spampinato et al patent exemplifies the prior art in memory arrays having memory cells comprising four field effect transistors. Such four device cells have traditionally not been D.C. stable and therefore required periodic refreshing to prevent loss of the stored information. A number of different techniques for refreshing such non-D.C. stable memory cells were developed, however, they all lack the advantageous feature of D.C. stability as described in the present application.